High voltage operation of devices, such as semiconductor devices, has remained a focus of intense research for decades. An ability of a semiconductor device to operate at a high level of bias and signal voltage is an important characteristic defining an overall device figure of merit. When an operating voltage approaches or exceeds the breakdown voltage for a particular semiconductor material and/or device structure and layout, the device becomes inoperable due to non-recoverable damage to the semiconductor material and/or electrodes forming the device. Numerous approaches have been proposed seeking to increase the breakdown voltage, and as a result, the operating voltages of a device.
Normally, the maximum operating voltage of a device is limited by the development of strong spikes of an electric field at the electrode edges or at the edges of p-n junctions. These spikes can lead to a local breakdown in such regions making the device inoperable. The spikes can form at voltages well below those expected from the average electric field in the bulk of the device material, causing the device breakdown to occur at an operating voltage well below the breakdown field of the bulk of the device material.
Many high power semiconductor devices are fabricated from silicon material, which has a relatively low breakdown field of thirty kilovolts per centimeter (kV/cm), close to that of air. In most of these devices, the breakdown occurs in the device itself, not in the air surrounding the device. As a result, most approaches seeking to maximize the operating voltage have been centered on optimization of the electric field profiles inside the device. Several approaches, including field terminating plates, guard rings, special doping profiles, etc., have sought to smoothen the electric field distribution within the device. For example, FIG. 1 shows an illustrative configuration for an electrode with multiple field plates according to the prior art. The multiple field plates can reduce the peak electric field in the semiconductor material, thereby increasing the operating voltage of the device. Similarly, FIG. 2 shows an illustrative rounded junction electrode structure according to the prior art. The rounded p-n junction formed in the semiconductor material can reduce the peak electric field in the semiconductor material, thereby increasing the operating voltage of the device.
Wide bandgap semiconductor materials, such as silicon carbide (SiC) and gallium nitride (GaN) are also being used to fabricate high power semiconductor devices. These materials comprise breakdown fields that are much higher than that of air. As a result, the SiC and/or GaN device design for high voltage operation can include measures to eliminate the breakdown in the surrounding air or semiconductor surface regions. A majority of SiC based high power devices have vertical structure, meaning that high voltage electrodes are located on opposing sides of the semiconductor wafer. Examples include high voltage diodes, bipolar junction transistors, and field effect transistors. In vertical geometry devices, the breakdown normally occurs in the surface regions of the semiconductor material where the electric field concentrates near the edges of a p-n junction or diffused regions. Consideration of direct breakdown between the electrodes in the air is less important due to a large separation between the high voltage electrodes.
High power devices fabricated using GaN and AlGaN compounds typically have a planar lateral layout. An important example of such devices is the heterostructure field effect transistor (HFET). For high gain, high speed operation, it is often desirable to reduce the spacing between the source, gate, and drain electrodes. The reduced spacing increases the electric field between the electrodes and theoretically makes the occurrence of a breakdown in the air surrounding the electrodes more likely since the internal breakdown field for GaN and AlGaN compounds, which is approximately five megavolts per centimeter (MV/cm), is much higher than that of air. However, one or more of the electrodes for GaN-based devices typically requires a high temperature (above 850 degrees Celsius) annealing, e.g., to form an ohmic contact. Due to the high annealing temperature typical for GaN-based devices, the contact edges get fairly rough. As a result, a highly non-uniform electric field is present at the rough edges of the ohmic contacts causing the breakdown to normally occur between the contact non-uniformities, regardless of the electrode shape.
Recently, non-annealed overlapping contacts, such as field controlling electrodes and RF enhanced contacts have been proposed for use in high voltage planar devices. In devices with overlapping contacts, a minimal inter-electrode spacing corresponds to the manufacture of the electrodes without the use of high temperature annealing. As a result, the edges of the electrodes have very low roughness compared to the high temperature annealed electrodes. In devices with field-controlling plates, the additional electrode minimizes the electric field spike in the semiconductor layer close to the gate edge.